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Translation_Macros
C++ for OpenVMS Alpha Systems does not support the VAX C built-in functions. However, the <builtins.h> header file contains macro definitions that translate some VAX C builtins to the equivalent C++ for OpenVMS Alpha builtins. Consequently, the following VAX C builtins are effectively supported:_BBCCI (position, address)
_BBSSI (position, address)
_INSQHI (new_entry, head)
_INSQTI (new_entry, head)
_INSQUE (new_entry, predecessor)
_REMQHI (head, removed_entry)
_REMQTI (head, removed_entry)
_REMQUE (entry, removed_entry)
_PROBER (mode, length, address)
_PROBEW (mode, length, address)
Intrinsic Functions
C++ supports in-line assembly code, commonly called ASMs on UNIX platforms.Like builtin-functions, ASMs are implemented with a function-call syntax. But unlike built-in functions, to use ASMs you must include the <c_asm.h> header file containing prototypes for the three types of ASMs, and the #pragma intrinsic preprocessor directive.
Syntax:
__int64 asm(const char *, ...); /* for integer operations, like mulq */
float fasm(const char *, ...); /* for single precision float instructions */
double dasm(const char *, ...); /* for double precision float instructions */
#pragma intrinsic (asm) #pragma intrinsic (fasm) #pragma intrinsic (dasm)
The first argument to the asm, fasm, or dasm function contains the instruction(s) to be generated inline and the metalanguage that describes the interpretation of the arguments.
The remaining arguments (if any) are the source and destination arguments for the instruction being generated.
__ABS
The __ABS builtin is functionally equivalent to its counterpart in the standard header file <stdlib.h>.Its syntax is also the same:
#include <stdlib.h> int __ABS (int x);
__ACQUIRE_SEM_LONG
The __ACQUIRE_SEM_LONG and __RELEASE_SEM_LONG functions provide a counted semaphore capability where the positive value of a longword is interpreted as the number of resources available.The __ACQUIRE_SEM_LONG function loops until the longword has a positive value and then decrements it within a load-locked/store-conditional sequence; it then issues a memory barrier. This function returns 1 if the resource count was successfully decremented within the specified number of retries, and 0 otherwise.
The __RELEASE_SEM_LONG function issues a memory barrier and then does an __ATOMIC_INCREMENT_LONG on the longword.
Syntax:
int __ACQUIRE_SEM_LONG (volatile void *address);
int __ACQUIRE_SEM_LONG_RETRY (volatile void *address, int retry);
int __RELEASE_SEM_LONG (volatile void *address);
__ADAWI
Adds its source operand to the destination. This function is interlocked against similar operations by other processors or devices in the system.Syntax:
int __ADAWI(short src, short *dest);
__ADD_ATOMIC_LONG
Adds the specified expression to the longword data segment pointed to by the address parameter within a load-locked/store-conditional code sequence. This address must point to an aligned longword.The third parameter (...) in the syntax is an optional retry count of type int. If specified, the retry count indicates the number of times the operation is attempted (which is at least once, even if the count argument is zero). If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
Syntax:
int __ADD_ATOMIC_LONG (void *address, int expression, ...);
__ADD_ATOMIC_QUAD
The __ADD_ATOMIC_QUAD function adds the specified expression to the quadword data segment pointed to by the address parameter within a load-locked/store-conditional code sequence. This address must point to an aligned quadword.The third parameter (...) in the syntax is an optional retry count of type int. If specified, the retry count indicates the number of times the operation is attempted (which is at least once, even if the count argument is zero). If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
Syntax:
int __ADD_ATOMIC_QUAD (void *address, int expression, ...);
__ADDF_C
Adds two single-precision, VAX floating-point numbers, using chopped arithmetic.Syntax:
float __ADDF_C(float operand1, float operand2);
__ADDG_C
Adds two double-precision, VAX floating-point numbers, using chopped arithmetic.Syntax:
float __ADDG_C(float operand1, float operand2);
__ADDS_C
Adds two single-precision, IEEE floating-point numbers, using chopped arithmetic.Syntax:
float __ADDS_C(float operand1, float operand2);
__ADDT_C
Adds two double-precision, IEEE floating-point numbers, using chopped arithmetic.Syntax:
float __ADDT_C(float operand1, float operand2);
__ADDX_C
Adds two long-double-precision, floating-point numbers, using chopped arithmetic.Syntax:
long double __ADDX_C(long double operand1, long double operand2);
__ALLOCA
Allocates n bytes from the stack and returns a pointer to the allocated memory.Syntax:
void *__ALLOCA (unsigned int n);
__AND_ATOMIC_LONG
Performs a logical AND of the specified expression with the longword data segment pointed to by the address parameter within a load-locked/store-conditional code sequence. This address must point to an aligned longword.The third parameter (...) in the syntax is an optional retry count of type int. If specified, the retry count indicates the number of times the operation is attempted (which is at least once, even if the count argument is zero). If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
Syntax:
int __AND_ATOMIC_LONG (void *address, int expression, ...);
__AND_ATOMIC_QUAD
Performs a logical AND of the specified expression with the quadword data segment pointed to by the address parameter within a load-locked/store-conditional code sequence. This address must point to an aligned quadword.The third parameter (...) in the syntax is an optional retry count of type int. If specified, the retry count indicates the number of times the operation is attempted (which is at least once, even if the count argument is zero). If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
Syntax:
int __AND_ATOMIC_QUAD (void *address, int expression, ...);
__ATOMIC_ADD_LONG
Adds the specified expression to the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the addition was performed.Syntax:
int __ATOMIC_ADD_LONG (volatile void *address, int expression);
int __ATOMIC_ADD_LONG_RETRY (volatile void *address, int expression, int retry, int *status);
__ATOMIC_ADD_QUAD
Adds the specified expression to the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the addition was performed.Syntax:
int __ATOMIC_ADD_QUAD (volatile void *address, int expression);
int __ATOMIC_ADD_QUAD_RETRY (volatile void *address, int expression, int retry, int *status);
__ATOMIC_AND_LONG
Performs a logical AND of the specified expression with the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the operation was performed.Syntax:
int __ATOMIC_AND_LONG (volatile void *address, int expression);
int __ATOMIC_AND_LONG_RETRY (volatile void *address, int expression, int retry, int *status);
__ATOMIC_AND_QUAD
Performs a logical AND of the specified expression with the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the operation was performed.Syntax:
int __ATOMIC_AND_QUAD (volatile void *address, int expression);
int __ATOMIC_AND_QUAD_RETRY (volatile void *address, int expression, int retry, int *status);
__ATOMIC_OR_LONG
Performs a logical OR of the specified expression with the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the operation was performed.Syntax:
int __ATOMIC_OR_LONG (volatile void *address, int expression);
int __ATOMIC_OR_LONG_RETRY (volatile void *address, int expression, int retry, int *status);
__ATOMIC_OR_QUAD
Performs a logical OR of the specified expression with the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the operation was performed.Syntax:
int __ATOMIC_OR_QUAD (volatile void *address, int expression);
int __ATOMIC_OR_QUAD_RETRY (volatile void *address, int expression, int retry, int *status);
__ATOMIC_INCREMENT_LONG
Increments by 1 the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the operation was performed.Syntax:
int __ATOMIC_INCREMENT_LONG (volatile void *address);
__ATOMIC_INCREMENT_QUAD
Increments by 1 the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the operation was performed.Syntax:
int __ATOMIC_INCREMENT_QUAD (volatile void *address);
__ATOMIC_DECREMENT_LONG
Decrements by 1 the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the operation was performed.Syntax:
int __ATOMIC_DECREMENT_LONG (volatile void *address);
__ATOMIC_DECREMENT_QUAD
Decrements by 1 the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the operation was performed.Syntax:
int __ATOMIC_DECREMENT_QUAD (volatile void *address);
__ATOMIC_EXCH_LONG
Stores the value of the specified expression to the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the operation was performed.Syntax:
int __ATOMIC_EXCH_LONG (volatile void *address, int expression);
int __ATOMIC_EXCH_LONG_RETRY (volatile void *address, int expression, int retry, int *status);
__ATOMIC_EXCH_QUAD
Stores the value of the specified expression to the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the operation was performed.Syntax:
int __ATOMIC_EXCH_QUAD (volatile void *address, int expression);
int __ATOMIC_EXCH_QUAD_RETRY (volatile void *address, int expression, int retry, int *status);
__CMP_STORE_LONG
This function performs a conditional atomic compare and update operation involving one or two longwords in the same lock region. The value pointed to by source is compared with the longword old_value. If they are equal, the longword new_value is conditionally stored into the value pointed to by dest.The store will not complete if the compare yields unequal values or if there is an intervening store to the lock region involved. To be in the same lock region, source and dest must point to aligned longwords in the same naturally aligned 16-byte region.
The function returns 0 if the store does not complete, and 1 if the store does complete.
Syntax:
int __CMP_STORE_LONG (volatile void *source, int old_value, int new_value, volatile void *dest);
__CMP_STORE_QUAD
This function performs a conditional atomic compare and update operation involving one or two quadwords in the same lock region. The value pointed to by source is compared with the quadword old_value. If they are equal, the quadword new_value is conditionally stored into the value pointed to by dest.The store will not complete if the compare yields unequal values or if there is an intervening store to the lock region involved. To be in the same lock region, source and dest must point to aligned quadwords in the same naturally aligned 16-byte region.
The function returns 0 if the store does not complete, and 1 if the store does complete.
Syntax:
int __CMP_STORE_QUAD (volatile void *source, int64 old_value, int64 new_value, volatile void *dest);
__COS
The __COS builtin is functionally equivalent to its counterpart in the standard header file <math.h>.Its syntax is also the same:
#include <math.h> double __COS (double x);
__CPYS
Copies the sign bit of a double-precision, floating-point number.This builtin fetches the sign bit in operand1, concatenates it with the exponent and fraction bits from operand2, and returns the result.
Syntax:
double __CPYS (double operand1, double operand2);
__CPYSF
Copies the sign bit of a single-precision, floating-point number.This builtin fetches the sign bit in operand1, concatenates it with the exponent and fraction bits from operand2, and returns the result.
Syntax:
float __CPYSF (float operand1, float operand2);
__CPYSN
Copies and negates the sign bit of a double-precision, floating-point number.This builtin fetches the sign bit in operand1, complements it, concatenates it with the exponent and fraction bits from operand2, and returns the result.
Syntax:
double __CPYSN (double operand1, double operand2);
__CPYSNF
Copies and negates the sign bit of a single-precision, floating-point number.This builtin fetches the sign bit in operand1, complements it, concatenates it with the exponent and fraction bits from operand2, and returns the result.
Syntax:
float __CPYSNF (float operand1, float operand2);
__CPYSE
Copies the sign and exponent bits of a double-precision, floating-point number.This builtin fetches the sign and exponent bits from operand1, concatenates them with the fraction bits from operand2, and returns the result.
Syntax:
double __CPYSE (double operand1, double operand2);
__CPYSEF
Copies the sign and exponent bits of a single-precision, floating-point number.This builtin fetches the sign and exponent bits from operand1, concatenates them with the fraction bits from operand2, and returns the result.
Syntax:
float __CPYSEF (float operand1, float operand2);
__CVTGF_C
Chops a double-precision, VAX G-floating-point number to a single-precision, VAX F-floating-point number.Syntax:
float __CVTGF_C (double operand1);
__CVTGQ
Rounds a double precision VAX-floating point number to a 64-bit integer value.Syntax:
int64 __CVTGQ(double operand1);
__CVTTQ
Rounds a double precision IEEE-floating point number to a 64-bit integer value.Syntax:
int64 __CVTTQ(double operand1);
__CVTTS_C
Chops a double-precision, IEEE T-floating-point number to a single-precision, IEEE S-floating-point number.Syntax:
float __CVTTS_C (double operand1);
__CVTXQ
Converts an X_floating-point number to a 64-bit integer value and returns the result.Syntax:
int64 __CVTXQ(long double operand1);
__CVTXT_C
Chops an X_floating-point number to an IEEE T_floating-point number and returns the result.Syntax:
double __CVTXT_C(long double operand1);
__DIVF_C
Divides two single-precision, VAX floating-point numbers, using chopped arithmetic.Syntax:
float __DIVF_C(float operand1, float operand2);
__DIVG_C
Divides two double-precision, VAX floating-point numbers, using chopped arithmetic.Syntax:
float __DIV_C(float operand1, float operand2);
__DIVS_C
Divides two single-precision, IEEE floating-point numbers, using chopped arithmetic.Syntax:
float __DIVS_C(float operand1, float operand2);
__DIVT_C
Divides two double-precision, IEEE floating-point numbers, using chopped arithmetic.Syntax:
float __DIVT_C(float operand1, float operand2);
__DIVX_C
Divides two long-double-precision, floating-point numbers, using chopped arithmetic.Syntax:
long double __DIVX_C(long double operand1, long double operand2);
__INTERLOCKED_TESTBITCC_QUAD
Performs the following functions in interlocked fashion:1. Returns the complement of the specified bit before being cleared.
2. Clears the bit.
Syntax:
int __INTERLOCKED_TESTBITCC_QUAD (volatile void *address, int bit_position);
int __INTERLOCKED_TESTBITCC_QUAD_RETRY (volatile void *address, int bit_position, int retry, int *status);
__INTERLOCKED_TESTBITSS_QUAD
Performs the following functions in interlocked fashion:1. Returns the value of the specified bit before being set.
2. Sets the bit.
Syntax:
int __INTERLOCKED_TESTBITSS_QUAD (volatile void *address, int bit_position);
int __INTERLOCKED_TESTBITSS_QUAD_RETRY (volatile void *address, int bit_position, int retry, int *status);
__FABS
The __FABS builtin is functionally equivalent to its counterpart in the standard header file <math.h>.Its syntax is also the same:
#include <math.h> int __FABS (int x);
__LABS
The __LABS builtin is functionally equivalent to its counterpart in the standard header file <stdlib.h>.Its syntax is also the same:
#include <stdlib.h> int __LABS (int x);
__LOCK_LONG
The __LOCK_LONG and __UNLOCK_LONG functions provide a binary spinlock capability based on the low-order bit of a longword.The __LOCK_LONG function executes in a loop waiting for the bit to be cleared and then sets it within a load-locked/store-conditional sequence; it then issues a memory barrier. The __UNLOCK_LONG function issues a memory barrier and then zeroes the longword.
The __LOCK_LONG_RETRY function returns 1 if the lock was acquired in the specified number of retries and 0 if the lock was not acquired.
Syntax:
int __LOCK_LONG (volatile void *address);
int __LOCK_LONG_RETRY (volatile void *address, int retry);
int __UNLOCK_LONG (volatile void *address);
__MB
Directs the compiler to generate a memory barrier instruction.Syntax:
void __MB(void);
__MEMCPY
The __MEMCPY builtin is functionally equivalent to its run-time library counterpart defined in the standard header file <string.h>.Its syntax is also the same:
#include <string.h>. void *__MEMCPY (void *s1, const void *s2, size_t size);
__MEMMOVE
The __MEMMOVE builtin is functionally equivalent to its run-time library counterpart defined in the standard header file <string.h>.Its syntax is also the same:
#include <string.h>. void *__MEMMOVE (void *s1, const void *s2, size_t size);
__MEMSET
The __MEMSET builtin is functionally equivalent to its run-time library counterpart defined in the standard header file <string.h>.Its syntax is also the same:
#include <string.h>. void *__MEMSET (void *s, int value, size_t size);
__MULF_C
Multiplies two single-precision, VAX floating-point numbers, using chopped arithmetic.Syntax:
float __MULF_C(float operand1, float operand2);
__MULG_C
Multiplies two double-precision, VAX floating-point numbers, using chopped arithmetic.Syntax:
float __MULG_C(float operand1, float operand2);
__MULS_C
Multiplies two single-precision, IEEE floating-point numbers, using chopped arithmetic.Syntax:
float __MULS_C(float operand1, float operand2);
__MULT_C
Multiplies two double-precision, IEEE floating-point numbers, using chopped arithmetic.Syntax:
float __MULT_C(float operand1, float operand2);
__MULX_C
Multiplies two long-double-precision, floating-point numbers, using chopped arithmetic.Syntax:
long double __MULX_C(long double operand1, long double operand2);
__OR_ATOMIC_LONG
The __OR_ATOMIC_LONG function performs a logical OR of the specified expression with the longword data segment pointed to by the address parameter within a load-locked/store-conditional code sequence. This address must point to an aligned longword.The third parameter (...) in the syntax is an optional retry count of type int. If specified, the retry count indicates the number of times the operation is attempted (which is at least once, even if the count argument is zero). If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
Syntax:
int __OR_ATOMIC_LONG (void *address, int expression, ...);
__OR_ATOMIC_QUAD
The __OR_ATOMIC_QUAD function performs a logical OR of the specified expression with the quadword data segment pointed to by the address parameter within a load-locked/store-conditional code sequence. This address must point to an aligned quadword.The third parameter (...) in the syntax is an optional retry count of type int. If specified, the retry count indicates the number of times the operation is attempted (which is at least once, even if the count argument is zero). If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
Syntax:
int __OR_ATOMIC_QUAD (void *address, int expression, ...);
__PAL_BPT
Provided for program debugging, this function switches the processor to kernel mode and pushes registers R2 through R7, the updated PC, and PS onto the kernel stack. It then dispatches to the address in the breakpoint vector, which is stored in a control block.Syntax:
void __PAL_BPT (void);
__PAL_BUGCHK
Provided for error reporting, this function switches the processor to kernel mode and pushes registers R2 through R7, the updated PC, and PS onto the kernel stack. It then dispatches to the address in the bugcheck vector, which is stored in a control block.Syntax:
void __PAL_BUGCHK (void);
__PAL_CFLUSH
Flushes at least the entire physical page specified by the page frame number value from any data caches associated with the current processor. After a CFLUSH is done, the first subsequent load on the same processor to an arbitrary address in the target page is fetched from physical memory.Syntax:
void __PAL_CFLUSH (int value);
__PAL_CHME
Allows a process to change its mode to Executive in a controlled manner. The change in mode also results in a change of stack pointers: the old pointer is saved and the new pointer is loaded. Registers R2 through R7, PS, and PC are pushed onto the selected stack. The saved PC addresses the instruction following the CHME instruction.Syntax:
void __PAL_CHME (void);
__PAL_CHMK
Allows a process to change its mode to kernel in a controlled manner. The change in mode also results in a change of stack pointers: the old pointer is saved and the new pointer is loaded. Registers R2 through R7, PS, and PC are pushed onto the kernel stack. The saved PC addresses the instruction following the CHMK instruction.Syntax:
void __PAL_CHMK (void);
__PAL_CHMS
Allows a process to change its mode to Supervisor in a controlled manner. The change in mode also results in a change of stack pointers: the old pointer is saved and the new pointer is loaded. Registers R2 through R7, PS, and PC are pushed onto the selected stack. The saved PC addresses the instruction following the CHMS instruction.Syntax:
void __PAL_CHMS (void);
__PAL_CHMU
Allows a process to call a routine using the change mode mechanism. Registers R2 through R7, PS, and PC are pushed onto the current stack. The saved PC addresses the instruction following the CHMU instruction.Syntax:
void __PAL_CHMU (void);
__PAL_DRAINA
Stalls instruction issuing until all prior instructions are guaranteed to complete without incurring aborts.Syntax:
void __PAL_DRAINA (void);
__PAL_GENTRAP
Used for reporting run-time software conditions.Syntax:
void __PAL_GENTRAP (uint64 encoded_software_trap);
__PAL__HALT
Halts the processor when executed by a process running in kernel mode. This is a privileged function.Syntax:
void __PAL_HALT (void);
__PAL_INSQHIL
Inserts an entry at the front of a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to header and queue entries. The pointers to head and new_entry must not be equal.Syntax:
int __PAL_INSQHIL (void *head, void *new_entry);
__PAL_INSQHILR
Inserts an entry into the front of a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. The pointers to head and new_entry must not be equal. All parts of the queue must be memory resident.Syntax:
int __PAL_INSQHILR (void *head, void *new_entry);
__PAL_INSQHIQ
Inserts an entry at the front of a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. The pointers to head and new_entry must not be equal.Syntax:
int __PAL_INSQHIQ (void *head, void *new_entry);
__PAL_INSQHIQR
Inserts an entry into the front of a quuadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. The pointers to head and new_entry must not be equal. All parts of the queue must be memory resident.Syntax:
int __PAL_INSQHIQR (void *head, void *new_entry);
__PAL_INSQTIL
Inserts an entry into the front of a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. The pointers to head and new_entry must not be equal.Syntax:
int __PAL_INSQTIL (void *head, void *new_entry);
__PAL_INSQTILR
Inserts an entry into the front of a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. The pointers to head and new_entry must not be equal. All parts of the queue must be memory resident.Syntax:
int __PAL_INSQTILR (void *head, void *new_entry);
__PAL_INSQTIQ
Inserts an entry into the front of a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. The pointers to head and new_entry must not be equal.Syntax:
int __PAL_INSQTIQ (void *head, void *new_entry);
__PAL_INSQTIQR
Inserts an entry into the front of a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. The pointers to head and new_entry must not be equal. All parts of the queue must be memory resident.Syntax:
int __PAL_INSQTIQR (void *head, void *new_entry);
__PAL_INSQUEL
Inserts a new entry after an existing entry into a longword queue. This function must have write access to header and queue entries.Syntax:
int __PAL_INSQUEL (void *predecessor, void *new_entry);
__PAL_INSQUEL_D
Inserts a new entry after an existing entry into a longword queue deferred. This function must have write access to header and queue entries.Syntax:
int __PAL_INSQUEL_D (void *predecessor, void *new_entry);
__PAL_INSQUEQ
Inserts a new entry after an existing entry into a quadword queue. This function must have write access to header and queue entries.Syntax:
int __PAL_INSQUEQ (void *predecessor, void *new_entry);
__PAL_INSQUEQ_D
Inserts a new entry after an existing entry into a quadword queue deferred. This function must have write access to header and queue entries.Syntax:
int __PAL_INSQUEQ_D (void *predecessor, void *new_entry);
__PAL_LDQP
Returns the quadword-aligned memory object specified by address.Syntax:
uint64 __PAL_LDQP (void *address);
__PAL_MFPR_XXXX
These privileged functions return the contents of a particular processor register. The XXXX indicates the processor register to be read.Syntax:
unsigned int __PAL_MFPR_ASTEN (void); /* AST Enable */ unsigned int __PAL_MFPR_ASTSR (void); /* AST Summary Register */ void *__PAL_MFPR_ESP (void); /* Executive Stack Pointer */ int __PAL_MFPR_FEN (void); /* Floating-Point Enable */ int __PAL_MFPR_IPL (void); /* Interrupt Priority Level */ int __PAL_MFPR_MCES (void); /* Machine Check Error Summary */ void *__PAL_MFPR_PCBB (void); /* Privileged Context Block Base */ int64 __PAL_MFPR_PRBR (void); /* Processor Base Register */ int __PAL_MFPR_PTBR (void); /* Page Table Base Register */ void *__PAL_MFPR_SCBB (void); /* System Control Block Base */ unsigned int __PAL_MFPR_SISR (void); /* Software Interrupt Summary Register */ void *__PAL_MFPR_SSP (void); /* Supervisor Stack Pointer */ int64 __PAL_MFPR_TBCHK (void *address); /* Translation Buffer Check */ void *__PAL_MFPR_USP (void); /* User Stack Pointer */ void *__PAL_MFPR_VPTB (void); /* Virtual Page Table */ int64 __PAL_MFPR_WHAMI (void); /* Who Am I */
__PAL_MTPR_XXXX
These privileged functions load a value into one of the special processor registers. The XXXX indicates the processor register to be loaded.Syntax:
void __PAL_MTPR_ASTEN (unsigned int mask); /* AST Enable */ void __PAL_MTPR_ASTSR (unsigned int mask); /* AST Summary Register */ void __PAL_MTPR_DATFX (int value); /* Data Alignment Trap Fixup */ void __PAL_MTPR_ESP (void *address); /* Executive Stack Pointer */ void __PAL_MTPR_FEN (int value); /* Floating-Point Enable */ void __PAL_MTPR_IPIR (int64 number); /* Interprocessor Interrupt Request */ int __PAL_MTPR_IPL (int value); /* Interrupt Priority Level */ void __PAL_MTPR_MCES (int value); /* Machine Check Error Summary */ void __PAL_MTPR_PRBR (int64 value); /* Processor Base Register */ void __PAL_MTPR_SCBB (void *address); /* System Control Block Base */ void __PAL_MTPR_SIRR (int level); /* Software Interrupt Request Register */ void __PAL_MTPR_SSP (int *address); /* Supervisor Stack Pointer */ void __PAL_MTPR_TBIA (void); /* User Stack Pointer */ void __PAL_MTPR_TBIAP (void); /* Translation Buffer Invalidate All Process */ void __PAL_MTPR_TBIS (void *address); /* Translation Buffer Invalidate Single */ void __PAL_MTPR_TBISD (void *address); /* Translation Buffer Invalidate Single Data */ void __PAL_MTPR_TBISI (void *address); /* Translation Buffer Invalidate Single Instruction */ void __PAL_MTPR_USP (void *address); /* User Stack Pointer */ void __PAL_MTPR_VPTB (void *address); /* Virtual Page Table */
__PAL_PROBER
Checks the read accessibility of the first and last byte of the given address and length pair.Syntax:
int __PAL_PROBER (const void *base_address, int length, char mode);
__PAL_PROBEW
Checks the write accessibility of the first and last byte of the given address and length pair.Syntax:
int __PAL_PROBEW (const void *base_address, int length, char mode);
__PAL_RD_PS
Returns the Processor Status (PS).Syntax:
uint64 __PAL_RD_PS (void);
__PAL_REMQHIL
Removes the first entry from a longword queue in an indivisible manner. This operation is interlocked against similar operations by other processors or devices in the system. This function must have write access to the header and queue entries.Syntax:
int __PAL_REMQHIL (void *head, void **removed_entry);
__PAL_REMQHILR
Removes the first entry from a longword queue in an indivisible manner. This operation is interlocked against similar operations by other processors or devices in the system. This function must have write access to the header and queue entries. All parts of the queue must be memory resident.Syntax:
int __PAL_REMQHILR (void *head void, **removed_entry);
__PAL_REMQHIQ
Removes the first entry from a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other processors or devices in the system. This function must have write access to the header and queue entries.Syntax:
int __PAL_REMQHIQ (void *head, void **removed_entry);
__PAL_REMQHIQR
Removes the first entry from a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other processors or devices in the system. This function must have write access to the header and queue entries. All parts of the queue must be memory resident.Syntax:
int __PAL_REMQHIQR (void *head, void **removed_entry);
__PAL_REMQTIL
Removes the last entry from a longword queue in an indivisible manner. This operation is interlocked against similar operations by other processors or devices in the system. This function must have write access to the header and queue entries.Syntax:
int __PAL_REMQTIL (void *head, void **removed_entry);
__PAL_REMQTILR
Removes the last entry from a longword queue in an indivisible manner. This operation is interlocked against similar operations by other processors or devices in the system. This function must have write access to the header and queue entries. All parts of the queue must be memory resident.Syntax:
int __PAL_REMQTILR (void *head, void **removed_entry);
__PAL_REMQTIQ
Removes the last entry from a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other processors or devices in the system. This function must have write access to the header and queue entries.Syntax:
int __PAL_REMQTIQ (void *head, void **removed_entry);
__PAL_REMQTIQR
Removes the last entry from a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other processors or devices in the system. This function must have write access to the header and queue entries. All parts of the queue must be memory resident.Syntax:
int __PAL_REMQTIQR (void *head, void **removed_entry);
__PAL_REMQUEL
Removes an entry from a longword queue. This function must have write access to header and queue entries.Syntax:
int __PAL_REMQUEL (void *entry, void **removed_entry);
__PAL_REMQUEL_D
Removes an entry from a longword queue deferred. This function must have write access to header and queue entries.Syntax:
int __PAL_REMQUEL_D (void **entry, void **removed_entry);
__PAL_REMQUEQ
Removes an entry from a quadword queue. This function must have write access to header and queue entries.Syntax:
int __PAL_REMQUEQ (void *entry, void **removed_entry);
__PAL_REMQUEQ_D
Removes an entry from a quadword queue deferred. This function must have write access to header and queue entries.Syntax:
int __PAL_REMQUEQ_D (void **entry, void **removed_entry);
__PAL_STQP
Writes the quadword value to the memory location pointed to by address.Syntax:
void##__PAL_STQP (void *address, uint64 value);
__PAL_SWPCTX
Returns ownership of the data structure that contains the current hardware privileged context (the HWPCB) to the operating system and passes ownership of the new HWPCB to the processor.Syntax:
void __PAL_SWPCTX (void *address);
__PAL_SWASTEN
Swaps the previous state of the Asynchronous System Trap (AST) enable bit for the new state. The new state is supplied in bit 0 of new_state_mask. The previous state is returned, zero-extended.Syntax:
unsigned int __PAL_SWASTEN (int new_state_mask);
__PAL_WR_PS_SW
Writes the low-order three bits of mask into the Processor Status software field (PS<SW>).Syntax:
void __PAL_WR_PS_SW (int mask);
__RELEASE_SEM_LONG
The __ACQUIRE_SEM_LONG and __RELEASE_SEM_LONG functions provide a counted semaphore capability where the positive value of a longword is interpreted as the number of resources available.The __ACQUIRE_SEM_LONG function loops until the longword has a positive value and then decrements it within a load-locked/store-conditional sequence; it then issues a memory barrier. This function returns 1 if the resource count was successfully decremented within the specified number of retries, and 0 otherwise.
The __RELEASE_SEM_LONG function issues a memory barrier and then does an __ATOMIC_INCREMENT_LONG on the longword.
Syntax:
int __ACQUIRE_SEM_LONG (volatile void *address);
int __ACQUIRE_SEM_LONG_RETRY (volatile void *address, int retry);
int __RELEASE_SEM_LONG (volatile void *address);
__RPCC
Reads the current process cycle counter.Syntax:
uint64 __RPCC (void);
__SIN
The __SIN builtin is functionally equivalent to its counterpart in the standard header file <math.h>.Its syntax is also the same:
#include <math.h> double __SIN (double x);
__SUBF_C
Subtracts two single-precision, VAX floating-point numbers, using chopped arithmetic.Syntax:
float __SUBF_C(float operand1, float operand2);
__SUBG_C
Subtracts two double-precision, VAX floating-point numbers, using chopped arithmetic.Syntax:
float __SUBG_C(float operand1, float operand2);
__SUBS_C
Subtracts two single-precision, IEEE floating-point numbers, using chopped arithmetic.Syntax:
float __SUBS_C(float operand1, float operand2);
__SUBT_C
Subtracts two double-precision, IEEE floating-point numbers, using chopped arithmetic.Syntax:
float __SUBT_C(float operand1, float operand2);
__SUBX_C
Subtracts two long-double-precision, floating-point numbers, using chopped arithmetic.Syntax:
long double __SUBX_C(long double operand1, long double operand2);
__TESTBITCCI
Performs the following operations in interlocked fashion:1. Returns the complement of the specified bit before being cleared 2. Clears the bit
The third parameter (...) in the syntax is an optional retry count of type int. If specified, the retry count indicates the number of times the operation is attempted (which is at least once, even if the count argument is zero).
Syntax:
int __TESTBITCCI (void *address, int position, ...);
__TESTBITSSI
Performs the following operations in interlocked fashion:1. Returns the value of the specified bit before being set 2. Sets the bit
The third parameter (...) in the syntax is an optional retry count of type int. If specified, the retry count indicates the number of times the operation is attempted (which is at least once, even if the count argument is zero).
Syntax:
int __TESTBITSSI (void *address, int position, ...);
__TRAPB
Allows software to guarantee that, in a pipeline implementation, all previous arithmetic instructions will be completed without incurring any arithmetic traps before any instructions after the TRAPB instruction are issued.Syntax:
void __TRAPB (void);
__UMULH
Performs a quadword multiply high instruction.Syntax:
uint64 __UMULH (uint64 operand1, uint64 operand2);
The two operands are multiplied as unsigned integers to produce a 128-bit result. The high order 64-bits are returned. Notice that uint64 is a typedef for the Alpha data type unsigned __int64.
__UNLOCK_LONG
The __LOCK_LONG and __UNLOCK_LONG functions provide a binary spinlock capability based on the low-order bit of a longword.The __LOCK_LONG function executes in a loop waiting for the bit to be cleared and then sets it within a load-locked/store-conditional sequence; it then issues a memory barrier. The __UNLOCK_LONG function issues a memory barrier and then zeroes the longword.
The __LOCK_LONG_RETRY function returns 1 if the lock was acquired in the specified number of retries and 0 if the lock was not acquired.
Syntax:
int __LOCK_LONG (volatile void *address);
int __LOCK_LONG_RETRY (volatile void *address, int retry);
int __UNLOCK_LONG (volatile void *address);
VAXC$ESTABLISH
Used to establish an OpenVMS exception handler for a particular routine. This function establishes a special C++ RTL exception handler in the routine that called it. This special handler catches all RTL-related exceptions that occur in later routines, and passes on all other exceptions to your handler.Syntax:
#include <signal.h>
void VAXC$ESTABLISH(unsigned int (*exception_handler)(void *sigarr, void *mecharr));
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