Document revision date: 19 July 1999 | |
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The existing callers of MMG_STD$IOLOCK need to be very aware of the first of these differences. The second difference is likely to be transparent to most callers.
Because the routine MMG$IOLOCK is simply a JSB-to-CALL jacket routine
around MMG_STD$IOLOCK, the MMG$IOLOCK routine has also been removed.
B.17.1 CALL_IOLOCK macro
The CALL_IOLOCK MACRO-32 macro facilitates the use of the MMG_STD$IOLOCK routine by code that was originally written to use the JSB-interface counterpart MMG$IOLOCK. The CALL_IOLOCK macro has implicit register inputs and outputs that correspond to the register inputs and outputs of the JSB-interface for the MMG$IOLOCK routine.
Because this macro uses registers for its inputs and outputs, it can be altered to use the full 64-bit values in these registers and it can call the MMG_STD$IOLOCK_BUF routine instead of MMG_STD$IOLOCK. Nevertheless, the CALL_IOLOCK macro has been modified to generate a suppressable interface warning at compile-time, because:
The format of the macro call is:
CALL_IOLOCK [ INTERFACE_WARNING=YES|NO ] |
By default the interface warning is enabled and generates the following warning at compile-time:
%AMAC-W-GENWARN, generated WARNING: 0 CALL_IOLOCK interface has changed for 64-bit virtual addressing; set INTERFACE_WARNING=NO to disable messages. %AMAC-W-GENWARN, generated WARNING: 0 CALL_IOLOCK uses the 64-bit buffer address in R0 %AMAC-W-GENWARN, generated WARNING: 0 CALL_IOLOCK returns a 64-bit VA_PTE or fault VA in R1 %AMAC-W-GENWARN, generated WARNING: 0 CALL_IOLOCK does not lock the page table pages %AMAC-W-GENWARN, generated WARNING: 0 A call to IOC_STD$FILL_DIOBM may be required to derive a SVAPTE |
The compile-time warning serves to identify the existing callers of
this macro. Once the invoking code has been modified the warning can be
suppressed by specifying INTERFACE_WARNING=NO.
B.18 MMG_STD$UNLOCK, MMG$UNLOCK, MMG_STD$IOUNLOCK_BUF
The interface for the MMG_STD$UNLOCK routine is:
void mmg_std$unlock (int npages, void *svapte) |
The MMG$UNLOCK routine is simply a JSB-to-CALL jacket routine around MMG_STD$UNLOCK.
Because 32-bit PTE addresses that may point to PTE copies are sufficient for the needs of the MMG_STD$UNLOCK routine, there is no absolute requirement to change the interface of these routines. However, it is extremely likely that all callers of MMG_STD$UNLOCK and MMG$UNLOCK need to use the new DIOBM structure and need to call the new routine IOC_STD$RELEASE_DIOBM immediately after unlocking the memory buffer. Therefore, routine MMG_STD$UNLOCK has been renamed to MMG_STD$IOUNLOCK_BUF and the MMG$UNLOCK routine has been removed in order to make it difficult to miss the places where this source change is needed.
The interface for MMG_STD$IOUNLOCK_BUF is:
void mmg_std$iounlock_buf (const int npages, PTE_PQ const va_pte); |
Just like MMG_STD$UNLOCK, the MMG_STD$IOUNLOCK_BUF routine does not
depend on process context. However, the IPL and spinlocks of the caller
must allow this routine to acquire and restore the MMG spinlock.
B.18.1 CALL_UNLOCK macro
The CALL_UNLOCK MACRO-32 macro facilitates the use of the MMG_STD$UNLOCK routine by code that was originally written to use the JSB-interface counterpart MMG$UNLOCK. The CALL_UNLOCK macro has implicit register inputs that correspond to the register inputs and outputs of the JSB-interface for the MMG$UNLOCK routine.
This macro has been modified to use the full 64-bits of the R3 input which contains the PTE address and the macro calls the new MMG_STD$IOUNLOCK_BUF routine instead of MMG_STD$UNLOCK. In addition, the CALL_UNLOCK macro has been modified to generate a suppressable interface warning at compile-time. The format of the macro call is:
CALL_UNLOCK [ INTERFACE_WARNING=YES|NO ] |
By default the interface warning is enabled and generates the following warning at compile-time:
%AMAC-W-GENWARN, generated WARNING: 0 CALL_UNLOCK interface has changed for 64-bit virtual addressing; set INTERFACE_WARNING=NO to disable messages. %AMAC-W-GENWARN, generated WARNING: 0 CALL_UNLOCK uses the 64-bit PTE address in R3 %AMAC-W-GENWARN, generated WARNING: 0 CALL_UNLOCK does not unlock the page table pages %AMAC-W-GENWARN, generated WARNING: 0 A call to IOC_STD$RELEASE_DIOBM may be required to derive a SVAPTE |
The current versions of the MMG_STD$SVAPTECHK and MMG$SVAPTECHK routines compute a 32-bit svapte for either a process or system space address. As of OpenVMS Alpha Version 7.0, these routines are be restricted to a S0/S1 system space address and no longer accept an address in P0/P1 space. The MMG_STD$SVAPTECHK and MMG$SVAPTECHK routines check the full 64 bits of the input address and declare a bugcheck for an input address that is not in S0/S1 space. For S0/S1 input addresses, these routines return a 32-bit system virtual address of the PTE through the SPT window.
In releases prior to OpenVMS Alpha Version 7.0, the interface for this routine was:
void mmg_std$svaptechk (void *va, PCB *pcb, PHD *phd, void **svapte_p); |
The new interface for this routine is:
void mmg_std$svaptechk (VOID_PQ va, PCB *pcb, PHD *phd, PTE **svapte_p); |
The majority of callers of this routine use it with an S0/S1 address and do not need to change.
This appendix describes the new routines and macros available implementing for kernel threads.
In addition to a few new routines to convert a PID to a KTB address, the EXE$NAM_TO_PCB routine is modified to return the KTB address in R2, which previously was a scratch register. The new routines and macros all assume the caller is executing in kernel mode.
Converts an internal PID to a KTB address.
EXE$CVT_IPID_TO_KTB ipid ,ktb ,pcb
OpenVMS usage cond_value type longword (unsigned) access write only mechanism by value
Status indicating the success or failure of the operation.
ipid
OpenVMS usage process_id type longword (unsigned) access read mechanism by value
This argument provides the internal PID to be converted.ktb
OpenVMS usage address type quadword access write mechanism by reference
This argument provides the KTB address.pcb
OpenVMS usage address type quadword access write mechanism by reference
This argument provides the PCB address.
The EXE$CVT_IPID_TO_KTB routine converts an internal PID to a KTB address.
SS$_NONEXPR The process does not exist. SS$_NOSUCHTHREAD The process exists but the thread does not.
Converts an external PID to a KTB address.
EXE$CVT_EPID_TO_KTB epid ,ktb ,pcb
OpenVMS usage cond_value type longword (unsigned) access write only mechanism by value
Status indicating the success or failure of the operation.
epid
OpenVMS usage process_id type longword (unsigned) access read mechanism by value
This argument provides the external PID to be converted.ktb
OpenVMS usage address type quadword access write mechanism by reference
This argument provides the KTB address.pcb
OpenVMS usage address type quadword access write mechanism by reference
This argument provides the PCB address.
The EXE$CVT_EPID_TO_KTB routine converts an external PID to a KTB address.
SS$_NONEXPR The process does not exist. SS$_NOSUCHTHREAD The process exists but the thread does not.
Obtains the current process or thread KTB address. Applicable to BLISS, C, and MACRO-32. The following three command formats are for BLISS, C, and MACRO-32, respectively.
GET_CURKTB;
GET_CURKTB()
GET_CURKTB ktbreg , pcbreg, [preserve][test_multi=yes]
ktbreg
type access
This argument is the destination to return the KTB address. The default is R14.pcbreg
type access
This argument is the register containing the address of the PCB. The default is R14.preserve
type access
This argument is optional. The default is YES to preserve R0 and R1. Otherwise, it is NO.test_multi
type access
This argument is optional. The default is YES to test and validate if there is more than one KTB. If NO, it is assumed that the process is already known to be multithreaded.
The GET_CURKTB macro obtains the current process or thread KTB address.
Converts a PID to PCB and KTB addresses. Applicable to MACRO-32 only.
CVT_IPID_TO_PCB_KTB ipid ,ktbreg ,pcbreg ,fail
OpenVMS usage cond_value type longword (unsigned) access write only mechanism by value
Status indicating the success or failure of the operation.
ipid
type access
This argument provides the internal PID to be converted.ktbreg
type access
This argument is the destination to return the KTB address. The default is R14.pcbreg
type access
This argument provides the register which returns the PCB. The default is R14.preserve
type access
This argument is not used by this macro but is passed to CVT_IPID_TO_KTB to indicate whether to preserve R0 and R1.fail
type access
This argument provides the address to transfer control if the ipid argument is not valid. If this transfer is taken, R0 contains one of the status values in the Return Values section.
The CVT_IPID_TO_PCB_KTB macro converts a PID to PCB and KTB addresses. This macro applies to MACRO-32 only.
SS$_NONEXPR The process does not exist. SS$_NOSUCHTHREAD The process exists but the thread does not.
Converts a PID to a KTB address. Applies to MACRO-32 only.
CVT_IPID_TO_KTB ipid ,ktbreg ,pcbreg ,perserve ,fail
OpenVMS usage cond_value type longword (unsigned) access write only mechanism by value
Status indicating the success or failure of the operation.
ipid
type access
This argument provides the internal PID to be converted.ktbreg
type access
This argument provides the register that returns the KTB. The default is R14.pcbreg
type access
This argument provides the register which holds the PCB. The default is R14.preserve
type access
This argument's default is YES to save R0 and R1.fail
type access
This argument provides the address to transfer control if the ipid argument is not valid. If this transfer is taken, R0 contains one of the status values in the Return Values section.
The CVT_IPID_TO_KRB macro converts a PID to a KTB address. This macro applies to MACRO-32 only.
SS$_NONEXPR The process does not exist. SS$_NOSUCHTHREAD The process exists but the thread does not.
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