Document revision date: 30 March 2001

Contents

Preface
Preface	Preface
Chapter 1
1	Introduction
1.1	Quick Description of OpenVMS Alpha 64-Bit Virtual Addressing
1.2	Quick Description of OpenVMS Alpha Kernel Threads
1.3	How to Use This Guide
Part I
Part I	Privileged-Code Changes
Chapter 2
2	Upgrading Privileged Software to OpenVMS Alpha Version 7.0
2.1	Recommendations for Upgrading Privileged-Code Applications
2.1.1	Summary of Infrastructure Changes
2.1.2	Changes Not Identified by Warning Messages
2.2	I/O Changes
2.2.1	Impact of IRPE Data Structure Changes
2.2.2	Impact of MMG_STD$IOLOCK, MMG_STD$UNLOCK Changes
2.2.2.1	Direct I/O Functions
2.2.3	Impact of MMG_STD$SVAPTECHK Changes
2.2.4	Impact of PFN Database Entry Changes
2.2.5	Impact of IRP Changes
2.3	General Memory Management Infrastructure Changes
2.3.1	Location of Process Page Tables
2.3.2	Interpretation of Global and Process Section Table Index
2.3.3	Location of Process and System Working Set Lists
2.3.4	Size of a Working Set List Entry
2.3.5	Location of Page Frame Number (PFN) Database
2.3.6	Format of PFN Database Entry
2.3.7	Process Header WSLX and BAK Arrays
2.3.8	Free S0/S1 System Page Table Entry List
2.3.9	Location of the Global Page Table
2.3.10	Free Global Page Table Entry List
2.3.11	Region Descriptor Entries (RDEs)
2.4	Kernel Threads Changes
2.4.1	The CPU$L_CURKTB Field
2.4.2	Mutex Locking
2.4.3	Scheduling Routines
2.4.4	New MWAIT State
2.4.5	System Services Dispatching
2.4.6	Asynchronous System Traps (ASTs)
2.4.7	TB Invalidation and Macros
2.4.8	New PCB/KTB Fields
2.4.9	CTL$AL_STACK and CTL$AL_STACKLIM
2.4.10	Floating-Point Register and Execution Data Blocks (FREDs)
2.5	Registering Images That Have Version Dependencies
2.5.1	Version Identification (ID) Number Change to Three Subsystems
Chapter 3
3	Replacements for Removed Privileged Symbols
3.1	Removed Date Structure Fields
3.2	Removed Routines
3.3	Removed Macros
3.3.1	Removed MACRO-32 Macros Formerly in SYS$LIBRARY:LIB.MLB
3.3.2	C Header Files Removed From SYS$LIBRARY:SYS$LIB_C.TLB
3.4	Removed System Data Cells
Part II
Part II	Enhancing Privileged-Code Applications
Chapter 4
4	Modifying Device Drivers to Support 64-Bit Addressing
4.1	Recommendations for Modifying Device Drivers
4.2	Mixed Pointer Environment in C
4.3	$QIO Support for 64-Bit Addresses
4.4	Declaring Support for 64-Bit Addresses in Drivers
4.4.1	Drivers Written in C
4.4.2	Drivers Written in MACRO-32
4.4.3	Drivers Written in BLISS
4.5	I/O Mechanisms
4.5.1	Simple Buffered I/O
4.5.2	Direct I/O
4.5.3	Direct I/O Buffer Map (DIOBM)
4.5.4	64-Bit AST
4.5.5	64-Bit ACB Within the IRP
4.5.6	I/O Function Definitions
4.6	64-Bit Support in Example Driver
4.6.1	Example: Declaring 64-Bit Functions
4.6.2	Example: Declaring 64-Bit Buffered I/O Packet
4.6.3	Example: Changes to LR$WRITE
4.6.4	Example: Changes to LR$SETMODE
4.6.5	Example: Changes to LR$STARTIO
Chapter 5
5	Modifying User-Written System Services
Chapter 6
6	Kernel Threads Process Structure
6.1	Process Control Blocks (PCBs) and Process Headers (PHDs)
6.1.1	Effect of a Multithreaded Process on the PCB and PHD
6.2	Kernel Thread Blocks (KTBs)
6.2.1	KTB Vector
6.2.2	Floating-Point Registers and Execution Data Blocks (FREDs)
6.2.3	Kernel Threads Region
6.2.4	Per-Kernel Thread Stacks
6.2.5	Per-Kernel Thread Data Cells
6.2.6	Layout of the Per-Kernel Thread
6.2.7	Summary of Process Data Structures
6.3	Process Identifiers (PIDs)
6.3.1	Multithread Effects on the PID
6.3.2	Range Checking and Sequence Vectors
6.4	Process Status Bits
Appendix A
Appendix A	Data Structure Changes
A.1	Pointer Size Conventions
A.2	Buffer Object Descriptor (BOD)
A.3	Buffered I/O (BUFIO)
A.4	Complex Chained Buffer (CXB)
A.5	Data Chain Block (DCBE)
A.6	Direct I/O Buffer Map (DIOBM)
A.7	Function Decision Table (FDT)
A.8	I/O Request Packet (IRP)
A.9	I/O Request Packet Extension (IRPE)
A.10	Process Header (PHD)
A.11	SCSI-2 Diagnose Buffer (S2DGB)
A.12	VMS Communications Request Packet (VCRP)

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