Updated: 11 December 1998

VAX MACRO and Instruction Set Reference Manual

Divide

Format

2operand: opcode divr.rx, quo.mx

3operand: opcode divr.rx, divd.rx, quo.wx

Condition Codes

Exceptions

• floating overflow
• floating underflow
• divide by zero
• reserved operand

Opcodes

Description

In 2 operand format, the quotient operand is divided by the divisor operand and the quotient operand is replaced by the rounded result. In 3 operand format, the dividend operand is divided by the divisor operand, and the quotient operand is replaced by the rounded result.

Notes

1. On a reserved operand fault, the quotient operand is unaffected, and the condition codes are UNPREDICTABLE.
2. On floating underflow, if FU is set, a fault occurs. On a floating underflow fault, the quotient operand is unaffected. If FU is clear, the quotient operand is replaced by zero, and no exception occurs.

3. On floating overflow, the instruction faults, the quotient operand is unaffected, and the condition codes are UNPREDICTABLE.
4. On divide by zero, the quotient operand and condition codes are affected, as in note 3.

Extended Multiply and Integerize

Format

EMODF and EMODD:

opcode mulr.rx, mulrx.rb, muld.rx, int.wl, fract.wx

EMODG and EMODH:

opcode mulr.rx, mulrx.rw, muld.rx, int.wl, fract.wx

Condition Codes

Exceptions

• integer overflow
• floating underflow
• reserved operand

Opcodes

Description

The multiplier extension operand is concatenated with the multiplier operand to gain 8 (EMODD and EMODF), 11 (EMODG), or 15 (EMODH) additional low-order fraction bits. The low-order 5 or 1 bits of the 16-bit multiplier extension operand are ignored by the EMODG and EMODH instructions, respectively. The multiplicand operand is multiplied by the extended multiplier operand. The multiplication result is equivalent to the exact product truncated (before normalization) to a fraction field of 32 bits in F_floating, 64 bits in D_floating and G_floating, and 128 bits in H_floating. The result is regarded as the sum of an integer and fraction of the same sign. The integer operand is replaced by the integer part of the result, and the fraction operand is replaced by the rounded fractional part of the result.

Notes

1. On a reserved operand fault, the integer operand, and the fraction operand are unaffected. The condition codes are UNPREDICTABLE.
2. On floating underflow, if FU is set, a fault occurs. On a floating underflow fault, the integer and fraction parts are unaffected. If FU is clear, the integer and fraction parts are replaced by zero, and no exception occurs.
3. On integer overflow, the integer operand is replaced by the low-order bits of the true result.
4. Floating overflow is indicated by integer overflow; however, integer overflow is possible in the absence of floating overflow.
5. The signs of the integer and fraction are the same unless integer overflow results.
6. Because the fraction part is rounded after separation of the integer part, it is possible that the value of the fraction operand is 1.

Move Negated

Format

opcode src.rx, dst.wx

Condition Codes

Exceptions

• reserved operand

Opcodes

Description

The destination operand is replaced by the negative of the source operand.

Move

Format

opcode src.rx, dst.wx

Condition Codes

Exceptions

• reserved operand

Opcodes

Description

The destination operand is replaced by the source operand.

Note

On a reserved operand fault, the destination operand is unaffected, and the condition codes are UNPREDICTABLE.

Multiply

Format

2operand: opcode mulr.rx, prod.mx

3operand: opcode mulr.rx, muld.rx, prod.wx

Condition Codes

Exceptions

• floating overflow
• floating underflow
• reserved operand

Opcodes

Description

In 2 operand format, the product operand is multiplied by the multiplier operand, and the product operand is replaced by the rounded result. In 3 operand format, the multiplicand operand is multiplied by the multiplier operand, and the product operand is replaced by the rounded result.

Notes

1. On a reserved operand fault, the product operand is unaffected, and the condition codes are UNPREDICTABLE.
2. On floating underflow, if FU is set, a fault occurs. On a floating underflow fault, the product operand is unaffected. If FU is clear, the product operand is replaced by zero, and no exception occurs.
3. On floating overflow, the instruction faults, the product operand is unaffected, and the condition codes are UNPREDICTABLE.

Polynomial Evaluation

Format

opcode arg.rx, degree.rw, tbladdr.ab

Condition Codes

Exceptions

• floating overflow
• floating underflow
• reserved operand

Opcodes

Description

The table address operand points to a table of polynomial coefficients. The coefficient of the highest-order term of the polynomial is pointed to by the table address operand. The table is specified with lower-order coefficients stored at increasing addresses. The data type of the coefficients is the same as the data type of the argument operand. The evaluation is carried out by Horner's method, and the contents of R0 (R1'R0 for POLYD and POLYG, R3'R2'R1'R0 for POLYH) are replaced by the result. The result computed is:

if d = degree and x = arg result = C[0]+x**0 + x*(C[1] + x*(C[2] + ... x*C[d]))

The unsigned word degree operand specifies the highest-numbered coefficient to participate in the evaluation. POLYH requires four longwords on the stack to store arg in case the instruction is interrupted.

Notes

1. After execution:
   • POLYF:
   • R0 = result
   • R1 = 0
   • R2 = 0
   • R3 = table address + degree*4 + 4
   • POLYD and POLYG:
   • R0 = high-order part of result
   • R1 = low-order part of result
   • R2 = 0
   • R3 = table address + degree*8 + 8
   • R4 = 0
   • R5 = 0
   • POLYH:
   • R0 = highest-order part of result
   • R1 = second-highest-order part of result
   • R2 = second-lowest-order part of result
   • R3 = lowest-order part of result
   • R4 = 0
   • R5 = table address + degree*16 + 16
2. On a floating fault:
   • If PSL<FPD> = 0, the instruction faults, and all relevant side effects are restored to their original state.
   • If PSL<FPD> = 1, the instruction is suspended, and the state is saved in the general registers as follows:

     POLYF: R0 = tmp3 ! Partial result after iteration ! prior to the one causing the ! overflow/underflow R1 = arg R2<7:0> = tmp1 ! Number of iterations remaining R2<31:8> = implementation specific R3 = tmp2 ! Points to table entry causing ! exception POLYD and POLYG: R1'R0 = tmp3 ! Partial result after iteration ! prior to the one causing the ! overflow/underflow R2<7:0> = tmp1 ! Number of iterations remaining R2<31:8> = implementation specific R3 = tmp2 ! Points to table entry causing ! exception R5'R4 = arg POLYH: R3'R2'R1'R0 = tmp3 ! Partial result after iteration ! prior to the one causing the ! overflow/underflow R4<7:0> = tmp1 ! Number of iterations remaining R4<31:8> = implementation specific R5 = tmp2 ! Points to table entry causing ! exception

     
     arg is saved on the stack in use during the faulting instruction.
     Implementation-specific information is saved to allow the instruction to continue after possible scaling of the coefficients and partial result by the fault handler.

3. If the unsigned word degree operand is zero and the argument is not a reserved operand, the result is C[0].
4. If the unsigned word degree operand is greater than 31, a reserved operand fault occurs.
5. On a reserved operand fault:
   • If PSL<FPD> = 0, the reserved operand is either the degree operand (greater than 31), or the argument operand, or some coefficient.
   • If PSL<FPD> = 1, the reserved operand is a coefficient, and R3 (except for POLYH) or R5 (for POLYH) is pointing at the value that caused the exception.
   • The state of the saved condition codes and the other registers is UNPREDICTABLE. If the reserved operand is changed and the contents of the condition codes and all registers are preserved, the fault can be continued.
6. On floating underflow after the rounding operation at any iteration of the computation loop, a fault occurs if FU is set. If FU is clear, the temporary result (tmp3) is replaced by zero and the operation continues. In this case, the final result may be nonzero if underflow occurred before the last iteration.
7. On floating overflow after the rounding operation at any iteration of the computation loop, the instruction terminates with a fault.
8. If the argument is zero and one of the coefficients in the table is the reserved operand, whether a reserved operand fault occurs is UNPREDICTABLE.
9. For POLYH, some implementations may not save arg on the stack until after an interrupt or fault occurs. However, arg will always be on the stack if an interrupt or floating fault occurs after FPD is set. If the four longwords on the stack overlap any of the source operands, the results are UNPREDICTABLE.

Example

; To compute P(x) = C0 + C1*x + C2*x**2 
; where C0 = 1.0,  C1 = .5, and C2 = .25 
 
        POLYF   X,#2,PTABLE 
        . 
        . 
        . 
PTABLE: .FLOAT  0.25    ; C2 
        .FLOAT  0.5     ; C1 
        .FLOAT  1.0     ; C0 
      

Subtract

Format

2operand: opcode sub.rx, dif.mx

3operand: opcode sub.rx, min.rx, dif.wx

Condition Codes

Exceptions

• floating overflow
• floating underflow
• reserved operand

Opcodes

Description

In 2 operand format, the subtrahend operand is subtracted from the difference operand, and the difference is replaced by the rounded result. In 3 operand format, the subtrahend operand is subtracted from the minuend operand, and the difference operand is replaced by the rounded result.

Notes

1. On a reserved operand fault, the difference operand is unaffected, and the condition codes are UNPREDICTABLE.
2. On floating underflow, if FU is set, a fault occurs. Zero is stored as the result of floating underflow only if FU is clear. On a floating underflow fault, the difference operand is unaffected. If FU is clear, the difference operand is replaced by zero, and no exception occurs.
3. On floating overflow, the instruction faults, the difference operand is unaffected, and the condition codes are UNPREDICTABLE.

Test

Format

opcode src.rx

Condition Codes

Exceptions

• reserved operand

Opcodes

Description

The condition codes are affected according to the value of the source operand.

Notes

1. TSTx src is equivalent to CMPx src, #0, but is 5 (F_floating) or 9 (D_floating or G_floating) or 17 (H_floating) bytes shorter.
2. On a reserved operand fault, the condition codes are UNPREDICTABLE.

Copyright © Compaq Computer Corporation 1998. All rights reserved. Legal

4515PRO_024.HTML