Updated: 11 December 1998 |
VAX MACRO and Instruction Set Reference Manual
Previous | Contents | Index |
Adjust Input Length
opcode pattern len
47 | EO$ADJUST_INPUT | Adjust Input Length |
The EO$ADJUST_INPUT pattern operator is followed by an unsigned byte integer length in the range 1 to 31. If the source string has more digits than this length, the excess leading digits are read and discarded. If any discarded digits are nonzero, the overflow is set, significance is set, and zero is cleared. If the source string has fewer digits than this length, a counter is set of the number of leading zeros to supply. This counter is stored as a negative number in R0<31:16>.
Note
If the length is not in the range 1 to 31, the destination string, condition codes, and R0 to R5 are UNPREDICTABLE.
Blank Backwards when Zero
opcode pattern len
45 | EO$BLANK_ZERO | Blank Backwards when Zero |
The EO$BLANK_ZERO pattern operator is followed by an unsigned byte integer length. If the value of the source string is zero, then the contents of the fill register are stored into the last length bytes of the destination string.
Notes
End Edit
opcode pattern
00 | EO$END | End Edit |
The EO$END pattern operator terminates the edit operation.
Notes
End Floating Sign
opcode pattern
01 | EO$END_FLOAT | End Floating Sign |
The EO$END_FLOAT pattern operator terminates a floating sign operation. If the floating sign has not yet been placed in the destination (if significance is not set), the contents of the sign register are stored in the destination, and significance is set.
Note
Use this pattern operator after a sequence of one or more EO$FLOAT pattern operators that start with significance clear. The EO$FLOAT sequence can include intermixed EO$INSERTs and EO$FILLs.
Store Fill
opcode pattern r
8x | EO$FILL | Store Fill |
The rightmost nibble of the pattern operator is the repeat count. The EO$FILL pattern operator places the contents of the fill register into the destination the number of times specified by the repeat count.
Note
Use this pattern operator for fill (blank) insertion.
Float Sign
opcode pattern r
Ax | EO$FLOAT | Float Sign |
The EO$FLOAT pattern operator moves digits, floating the sign across insignificant digits. The rightmost nibble of the pattern operator is the repeat count. For the number of times specified in the repeat count, the following algorithm is executed:The next digit from the source is examined. If it is nonzero and significance is not yet set, then the contents of the sign register are stored in the destination, significance is set, and zero is cleared. If the digit is significant, it is stored in the destination; otherwise, the contents of the fill register are stored in the destination.
Notes
Insert Character
opcode pattern ch
44 | EO$INSERT | Insert Character |
The EO$INSERT pattern operator is followed by a character. If significance is set, the character is placed into the destination. If significance is not set, the contents of the fill register are placed into the destination.
Note
Use this pattern operator for inserts that can be made blank (for example, comma (,)) and fixed inserts (for example, slash (/)). Fixed inserts require that significance be set (by EO$SET_SIGNIF or EO$END_FLOAT).
Load Register
opcode pattern ch
40 | EO$LOAD_FILL | Load Fill Register |
41 | EO$LOAD_SIGN | Load Sign Register |
42 | EO$LOAD_PLUS | Load Sign Register If Plus |
43 | EO$LOAD_MINUS | Load Sign Register If Minus |
The pattern operator is followed by a character. For EO$LOAD_FILL, this character is placed into the fill register. For EO$LOAD_SIGN, this character is placed into the sign register. For EO$LOAD_PLUS, this character is placed into the sign register if the source string has a positive sign. For EO$LOAD_MINUS, this character is placed into the sign register if the source string has a negative sign.
Notes
Move Digits
opcode pattern r
9x | EO$MOVE | Move Digits |
The EO$MOVE pattern operator moves digits, filling for insignificant digits. The rightmost nibble of the pattern operator is the repeat count. For the number of times specified in the repeat count, the following algorithm is executed:The next digit is moved from the source to the destination. If the digit is nonzero, significance is set and zero is cleared. If the digit is not significant (that is, a leading zero), it is replaced by the contents of the fill register in the destination.
Notes
Replace Sign when Zero
opcode pattern len
46 | EO$REPLACE_SIGN | Replace Sign when Zero |
The EO$REPLACE_SIGN pattern operator is followed by an unsigned byte integer length. If the value of the source string is zero (that is, if Z is set), the contents of the fill register are stored in the byte of the destination string that is len bytes before the current position.
Notes
Significance
opcode pattern
02 | EO$CLEAR_SIGNIF | Clear Significance |
03 | EO$SET_SIGNIF | Set Significance |
The significance indicator is set or cleared. This controls the treatment of leading zeros (leading zeros are zero digits for which the significance indicator is clear).
Notes
Store Sign
opcode pattern
04 | EO$STORE_SIGN | Store Sign |
The EO$STORE_SIGN pattern operator places contents of the sign register into the destination.
Note
Use this pattern operator for any nonfloating arithmetic sign. Precede it with either a EO$LOAD_PLUS or EO$LOAD_MINUS, or both, if the default sign convention is not desired.
9.2.13 Other VAX Instructions
The following table lists other VAX instructions:
Description and Opcode | Number of Instructions | |
---|---|---|
1. |
Probe {Read, Write} Accessibility
PROBE{R,W} mode.rb, len.rw, base.ab |
2 |
2. |
Change Mode
CHM{K,E,S,U} param.rw, {-(ySP).w*} Where y=MINU(x, PSL<current_mode>) |
4 |
3. |
Return from Exception or Interrupt
REI {(SP)+.r*} |
1 |
4. |
Load Process Context
LDPCTX {PCB.r*, -(KSP).w*} |
1 |
5. |
Save Process Context
SVPCTX {(SP)+.r*, PCB.w*} |
1 |
6. |
Move to Process Register
MTPR src.rl, procreg.rl |
1 |
7. |
Move from Processor Register
MFPR procreg.rl, dst.wl |
1 |
8. |
Bugcheck with {word, longword} message identifier
BUG{W,L} message.bx |
2 |
Probe Accessibility
opcode mode.rb, len.rw, base.ab
N|| <--- 0; | |
Z|| <--- if {both accessible} then 0 else 1; | |
V|| <--- 0; | |
C|| <--- C; |
0C | PROBER | Probe Read Accessibility |
0D | PROBEW | Probe Write Accessibility |
The PROBE instruction checks the read or write accessibility of the first and last byte specified by the base address and the zero-extended length. Note that the bytes in between are not checked. System software must check all pages if they will be accessed between the two end bytes.The protection is checked against the larger (and therefore less privileged) of the modes specified in bits <1:0> of the mode operand and the previous mode field of the processor status longword (PSL). Note that probing with a mode operand of zero is equivalent to probing the mode specified in the previous-mode field of the PSL.
MOVL 4(AP),R0 ; Copy the address of first arg so ; that it cannot be changed PROBER #0,#4,(R0) ; Verify that the longword pointed to ; by the first arg could be read by ; the previous access mode ; Note that the arg list itself must ; already have been probed BEQL violation ; Branch if either byte gives an ; access violation MOVQ 8(AP),R0 ; Copy length and address of buffer ; arg so that they cannot change PROBER #0,R0,(R1) ; Verify that the buffer described by ; the 2nd and 3rd args could be ; written by the previous access ; mode ; Note that the arg list must already ; have been probed and that the 2nd ; arg must be known to be less than ; 512 BEQL violation ; Branch if either byte gives an ; access violation |
Note that for the PROBE instruction, probing an address returns only the accessibility of the pages and has no effect on their residency. However, probing a process address may cause a page fault in the system address space on the per-process page tables.
Notes
Change Mode
opcode code.rw
N|| <--- 0; | |
Z|| <--- 0; | |
V|| <--- 0; | |
C|| <--- 0; |
BC | CHMK | Change Mode to Kernel |
BD | CHME | Change Mode to Executive |
BE | CHMS | Change Mode to Supervisor |
BF | CHMU | Change Mode to User |
Change mode instructions allow processes to change their access mode in a controlled manner. The instruction increases privilege only (decreases the access mode).A change in mode also results in a change of stack pointers; the old pointer is saved, and the new pointer is loaded. The processor status longword (PSL), program counter (PC), and code passed by the instruction are pushed onto the stack of the new mode. The saved PC addresses the instruction following the CHMx instruction. The code is sign extended. After execution, the appearance of the new stack is as follows:
The destination mode selected by the opcode is used to obtain a location from the system control block (SCB). This location addresses the CHMx dispatcher for the specified mode. If the vector<1:0> code is NEQU 0, then the operation is UNDEFINED.
Notes
#1 |
---|
CHMK #7 ; Request the kernel mode service ; specified by code 7 CHME #4 ; Request the executive mode service ; specified by code 4 CHMS #-2 ; Request the supervisor mode service ; specified by customer code -2 |
Return from Exception or Interrupt
opcode
N|| <--- saved PSL<3>; | |
Z|| <--- saved PSL<2>; | |
V|| <--- saved PSL<1>; | |
C|| <--- saved PSL<0>; |
02 | REI | Return from Exception or Interrupt |
A longword is popped from the current stack and held in a temporary program counter (PC). A second longword is popped from the current stack and held in a temporary processor status longword (PSL).The popped PSL is checked for internal consistency. If the processor is running virtual machine (VM) mode, the popped PSL is compared with the Virtual-Machine Processor Status Longword (VMPSL) to determine that the transition from current VMPSL to popped PSL is allowed, and a VM-emulation trap is taken. If the processor is running a real machine, the popped PSL is compared with the current PSL to determine that the transition from current PSL to popped PSL is allowed.
If the processor is not in kernel mode and is attempting to return to a PSL with the VMPSL VM bit set, a reserved operand fault occurs. The current stack pointer (SP) is saved, and a new SP is selected according to the new PSL CUR_MOD and IS fields. The level of the highest privilege asynchronous system trap (AST) is checked against the current mode to see whether a pending AST can be delivered. Execution resumes with the instruction being executed at the time of the exception or interrupt.
After completing an REI, a processor will correctly execute a modified instruction stream.
Notes
Previous | Next | Contents | Index |
Copyright © Compaq Computer Corporation 1998. All rights reserved. Legal |
4515PRO_029.HTML
|