Updated: 11 December 1998

VAX MACRO and Instruction Set Reference Manual

Format

%EXTRACT(symbol1,symbol2,string)

Parameters

symbol1

A symbol or decimal number that specifies the starting position of the substring to be extracted. The symbol must be an absolute symbol that has been previously defined; the number must be an unsigned decimal number. Expressions and radix operators are not allowed.

symbol2

A symbol or decimal number that specifies the length of the substring to be extracted. The symbol must be an absolute symbol that has been previously defined; the number must be an unsigned decimal number. Expressions and radix operators are not allowed.

string

A macro argument or a delimited string. The string can be delimited by angle brackets or a character preceded by a circumflex.

Description The %EXTRACT operator extracts a substring from a string. It returns the substring that begins at the specified position and is of the specified length. For example, the value of %EXTRACT(2,3,<ABCDEF>) is CDE. Note that the first character in a string is in position zero. Examples

The macro definition is as follows:

        .MACRO  RESERVE ARG1 
XX = %LOCATE(<=>,ARG1) 
        .IF EQUAL   XX-%LENGTH(ARG1) 
        .WARN   ; Incorrect format for macro call - ARG1 
        .MEXIT 
        .ENDC 
 
%EXTRACT(0,XX,ARG1):: 
XX = XX+1 
        .BLKB   %EXTRACT(XX,3,ARG1) 
        .ENDM   RESERVE 
      

The macro calls and expansions of the macro defined previously are as follows:

        RESERVE FOOBAR 
XX = 6 
        .IF EQUAL  XX-6 
%MACRO-W-GENWRN, Generated WARNING:  Incorrect format for macro call - FOOBAR 
 
        .MEXIT 
      

        RESERVE LOCATION=12 
XX = 8 
        .IF EQUAL  XX-11 
        .WARN   ; Incorrect format for macro call - LOCATION=12 
        .MEXIT 
        .ENDC 
 
LOCATION:: 
XX = XX+1 
        .BLKB   12 
      

This section summarizes the VAX addressing modes and contains examples of VAX MACRO statements that use these addressing modes. Table 5-1 summarizes the addressing modes. (Chapter 8 describes the addressing mode formats in detail.)

The following are the four types of addressing modes:

• General register
• Program counter (PC)
• Index
• Branch

Although index mode is a general register mode, it is considered separate because it can be used only in combination with another type of mode.

5.1 General Register Modes

The general register modes use registers R0 to R12, AP (the same as R12), FP, and SP.

The following are the eight general register modes:

• Register
• Register deferred
• Autoincrement
• Autoincrement deferred
• Autodecrement
• Displacement
• Displacement deferred
• Literal

Table 5-1 Addressing Modes

Type	Addressing Mode	Format	Hex Value	Description	Can Be Indexed?
General register	Register	Rn	5	Register contains the operand.	No
	Register deferred	(Rn)	6	Register contains the address of the operand.	Yes
	Autoincrement	(Rn)+	8	Register contains the address of the operand; the processor increments the register contents by the size of the operand data type.	Yes
	Autoincrement deferred	@(Rn)+	9	Register contains the address of the operand address; the processor increments the register contents by 4.	Yes
	Autodecrement	--(Rn)	7	The processor decrements the register contents by the size of the operand data type; the register then contains the address of the operand.	Yes
	Displacement	dis(Rn) B^dis(Rn) W^dis(Rn) L^dis(Rn)	A C E	The sum of the contents of the register and the displacement is the address of the operand; B^, W^, and L^ respectively indicate byte, word, and longword displacement.	Yes
	Displacement deferred	@dis(Rn) @B^dis(Rn) @W^dis(Rn) @L^dis(Rn)	B D F	The sum of the contents of the register and the displacement is the address of the operand address; B^, W^, and L^ respectively indicate, byte, word, and longword displacement.	Yes
	Literal	#literal S^#literal	0--3	The literal specified is the operand; the literal is stored as a short literal.	No
Program counter	Relative	address B^address W^address L^address	A C E	The address specified is the address of the operand; the address is stored as a displacement from the PC; B^, W^, and L^ respectively indicate byte, word, and longword displacement.	Yes
	Relative deferred	@address @B^address @W^address @L^address	B D F	The address specified is the address of the operand address; the address specified is stored as a displacement from the PC; B^, W^, and L^ indicate byte, word, and longword displacement respectively.	Yes
	Absolute	@#address	9	The address specified is the address of the operand; the address specified is stored as an absolute virtual address, not as a displacement.	Yes
	Immediate	#literal I^#literal	8	The literal specified is the operand; the literal is stored as a byte, word, longword, or quadword.	No
	General	G^address	---	The address specified is the address of the operand; if the address is defined as relocatable, the linker stores the address as a displacement from the PC; if the address is defined as an absolute virtual address, the linker stores the address as an absolute value.	Yes
Index	Index	base-mode[Rx]	4	The base-mode specifies the base address and the register specifies the index; the sum of the base address and the product of the contents of Rx and the size of the operand data type is the address of the operand; base mode can be any addressing mode except register, immediate, literal, index, or branch.	No
Branch	Branch	address	---	The address specified is the operand; this address is stored as a displacement from the PC; branch mode can only be used with the branch instructions.	No

• Rn ---Any general register R0 to R12. Note that the AP, FP, or SP register can be used in place of Rn.
• Rx ---Any general register R0 to R12. Note that the AP, FP, or SP register can be used in place of Rx. Rx cannot be the same as the Rn specified in the base-mode for certain base modes (see Section 5.3 ).
• dis ---An expression specifying a displacement.
• address ---An expression specifying an address.
• literal ---An expression, an integer constant, or a floating-point constant.

In register mode, the operand is the contents of the specified register, except in the following cases:

• For quadword, D_floating, G_floating, or variable-bit field operands, the operand is the contents of register n concatenated with the contents of register n+1.
• For octaword and H_floating operands, the operand is the contents of register n concatenated with the contents of registers n+1, n+2, and n+3.

In each of these cases, the least significant bytes of the operand are in register n and the most significant bytes are in the highest register used, either n+1 or n+3.

The results of the operation are unpredictable if you use the PC in register mode or if you use a large data type that extends the operand into the PC.

Formats

Rn
AP
FP
SP

n

A number in the range 0 to 12.

Example

CLRB R0 ; Clear lowest byte of R0 CLRQ R1 ; Clear R1 and R2 TSTW R10 ; Test lower word of R10 INCL R4 ; Add 1 to R4

5.1.2 Register Deferred Mode

In register deferred mode, the register contains the address of the operand. Register deferred mode can be used with index mode (see Section 5.3).

Formats

(Rn)
(AP)
(FP)
(SP)

Parameters

n

A number in the range 0 to 12.

Example

MOVAL LDATA,R3 ; Move address of LDATA to R3 CMPL (R3),R0 ; Compare value at LDATA to R0 BEQL 10$ ; If they are the same, ignore CLRL (R3) ; Clear longword at LDATA 10$: MOVL (SP),R1 ; Copy top item of stack into R1 MOVZBL (AP),R4 ; Get number of arguments in call

5.1.3 Autoincrement Mode

In autoincrement mode, the register contains the address of the operand. After evaluating the operand address contained in the register, the processor increments that address by the size of the operand data type. The processor increments the contents of the register by 1, 2, 4, 8, or 16 for a byte, word, longword, quadword, or octaword operand, respectively.

Autoincrement mode can be used with index mode (see Section 5.3), but the index register cannot be the same as the register specified in autoincrement mode.

Formats

(Rn)+
(AP)+
(FP)+
(SP)+

Parameters

n

A number in the range 0 to 12.

Example

MOVAL TABLE,R1 ; Get address of TABLE. CLRQ (R1)+ ; Clear first and second longwords CLRL (R1)+ ; and third longword in TABLE; ; leave R1 pointing to TABLE+12. MOVAB BYTARR,R2 ; Get address of BYTARR. INCB (R2)+ ; Increment first byte of BYTARR INCB (R2)+ ; and second. XORL3 (R3)+,(R4)+,(R5)+ ; Exclusive-OR the 2 longwords ; whose addresses are stored in ; R3 and R4 and store result in ; address contained in R5; then ; add 4 to R3, R4, and R5.

5.1.4 Autoincrement Deferred Mode

In autoincrement deferred mode, the register contains an address that is the address of the operand address (a pointer to the operand). After evaluating the operand address, the processor increments the contents of the register by 4 (the size in bytes of an address).

Autoincrement deferred mode can be used with index mode (see Section 5.3), but the index register cannot be the same as the register specified in autoincrement deferred mode.

Formats

@(Rn)+
@(AP)+
@(FP)+
@(SP)+

Parameters

n

A number in the range 0 to 12.

Example

MOVAL PNTLIS,R2 ; Get address of pointer list. CLRQ @(R2)+ ; Clear quadword pointed to by ; first absolute address in PNTLIS; ; then add 4 to R2. CLRB @(R2)+ ; Clear byte pointed to by second ; absolute address in PNTLIS ; then add 4 to R2. MOVL R10,@(R0)+ ; Move R10 to location whose address ; is pointed to by R0; then add 4 ; to R0.

5.1.5 Autodecrement Mode

In autodecrement mode, the processor decrements the contents of the register by the size of the operand data type; the register contains the address of the operand. The processor decrements the register by 1, 2, 4, 8, or 16 for byte, word, longword, quadword, or octaword operands, respectively.

Autodecrement mode can be used with index mode (see Section 5.3), but the index register cannot be the same as the register specified in autodecrement mode.

Formats

--(Rn)
--(AP)
--(FP)
--(SP)

Parameters

n

A number in the range 0 to 12.

Example

CLRO -(R1) ; Subtract 8 from R1 and zero ; the octaword whose address ; is in R1. MOVZBL R3,-(SP) ; Push the zero-extended low byte ; of R3 onto the stack as a ; longword. CMPB R1,-(R0) ; Subtract 1 from R0 and compare ; low byte of R1 with byte whose ; address is now in R0.

5.1.6 Displacement Mode

In displacement mode, the contents of the register plus the displacement (sign-extended to a longword) produce the address of the operand.

Displacement mode can be used with index mode (see Section 5.3). If used in displacement mode, the index register can be the same as the base register.

Formats

dis(Rn)
dis(AP)
dis(FP)
dis(SP)

Parameters

n

A number in the range 0 to 12.

dis

An expression specifying a displacement; the expression can be preceded by one of the following displacement length specifiers, which indicate the number of bytes needed to store the displacement:

Example

MOVAB KEYWORDS,R3 ; Get address of KEYWORDS. MOVB B^IO(R3),R4 ; Get byte whose address is IO ; plus address of KEYWORDS; ; the displacement is stored ; as a byte. MOVB B^ACCOUNT(R3),R5 ; Get byte whose address is ; ACCOUNT plus address of ; KEYWORDS; the displacement ; is stored as a byte. CLRW L^STA(R1) ; Clear word whose address ; is STA plus contents of R1; ; the displacement is stored ; as a longword. MOVL R0,-2(R2) ; Move R0 to address that is -2 ; plus the contents of R2; the ; displacement is stored as a ; byte. TSTB EXTRN(R3) ; Test the byte whose address ; is EXTRN plus the address ; of KEYWORDS; the displace- ; ment is stored as a word, ; since EXTRN is undefined. MOVAB 2(R5),R0 ; Move <contents of R5> + 2 ; to R0.

In displacement deferred mode, the contents of the register plus the displacement (sign-extended to a longword) produce the address of the operand address (a pointer to the operand).

Displacement deferred mode can be used with index mode (see Section 5.3). If used in displacement deferred mode, the index register can be the same as the base register.

Formats

@dis(Rn)
@dis(AP)
@dis(FP)
@dis(SP)

Parameters

n

A number in the range 0 to 12.

dis

An expression specifying a displacement; the expression can be preceded by one of the following displacement length specifiers, which indicate the number of bytes needed to store the displacement:

Example

MOVAL ARRPOINT,R6 ; Get address of array of pointers. CLRL @16(R6) ; Clear longword pointed to by ; longword whose address is ; <16 + address of ARRPOINT>; the ; displacement is stored as a byte. MOVL @B^OFFS(R6),@RSOFF(R6) ; Move the longword pointed to ; by longword whose address is ; <OFFS + address of ARRPOINT> ; to the address pointed to by ; longword whose address is ; <RSOFFS + address of ARRPOINT>; ; the first displacement is ; stored as a byte; the second ; displacement is stored as a word. CLRW @84(R2) ; Clear word pointed to by ; <longword at 84 + contents of R2>; ; the assembler uses byte ; displacement automatically.

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