Document revision date: 30 March 2001

A
Abort
kernel stack not valid
Absolute expression
Absolute mode
assembling relative mode as
Absolute queue
manipulating
ACBB (Add Compare and Branch Byte) instruction
ACBD (Add Compare and Branch D_floating) instruction
ACBF (Add Compare and Branch F_floating) instruction
ACBG (Add Compare and Branch G_floating) instruction
ACBH (Add Compare and Branch H_floating) instruction
ACBL (Add Compare and Branch Long) instruction
ACBW (Add Compare and Branch Word) instruction
Access mode
vector #1
vector #2
vector #3
ADAWI (Add Aligned Word Interlocked) instruction
ADDB2 (Add Byte 2 Operand) instruction
ADDB3 (Add Byte 3 Operand) instruction
ADDD2 (Add D_floating 2 Operand) instruction
ADDD3 (Add D_floating 3 Operand) instruction
ADDF2 (Add F_floating 2 Operand) instruction
ADDF3 (Add F_floating 3 Operand) instruction
ADDG2 (ADD G_floating 2 Operand) instruction
ADDG3 (ADD G_floating 3 Operand) instruction
ADDH2 (ADD H_floating 2 Operand) instruction
ADDH3 (ADD H_floating 3 Operand) instruction
ADDL2 (Add Long 2 Operand) instruction
ADDL3 (Add Long 3 Operand) instruction
ADDP4 (Add Packed 4 Operand) instruction
ADDP6 (Add Packed 6 Operand) instruction
Address
access type
instructions
storage directive (.ADDRESS)
translation vector
virtual
.ADDRESS directive
Address storage directive (.ADDRESS)
Addressing mode
absolute #1
absolute #2
autodecrement
autoincrement
autoincrement deferred
branch
determining
displacement
displacement deferred
general
general register
summary
immediate
usage restricted in vector memory instructions
usage restricted in vector memory instructions
index
literal #1
literal #2
operand specifier formats
program counter
summary
register
register deferred
relative #1
relative #2
relative #3
relative deferred #1
relative deferred #2
summary #1
summary #2
ADDW2 (Add Word 2 Operand) instruction
ADDW3 (Add Word 3 Operand) instruction
ADWC (Add with Carry) instruction
.ALIGN directive
Alignment vector #1
Alignment vector #2
AND operator
AOBLEQ (Add One and Branch Less Than or Equal) instruction
AOBLSS (Add One and Branch Less Than) instruction
Architecture
description of basic VAX
Argument
actual
in a macro
length
number of
Arithmetic instruction
decimal string
floating-point
integer
Arithmetic shift operator
.ASCIC directive
.ASCID directive
ASCII
character set
operator
.ASCII directive
ASCII string storage directive
counted (.ASCIC)
string (.ASCII)
string-descriptor (.ASCID)
zero-terminated (.ASCIZ)
.ASCIZ directive
ASHL (Arithmetic Shift Long) instruction
ASHP (Arithmetic Shift and Round Packed) instruction
ASHQ (Arithmetic Shift Quad) instruction
Assembler directives,
summary
Assembler notation
Assembly termination
Assembly termination directive (.END)
Assignment statement #1
Assignment statement #2
Asynchronous memory management exception handling #1
Asynchronous memory management exception handling #2
Autodecrement mode
operand specifier format
Autoincrement deferred mode
operand specifier format
Autoincrement mode
operand specifier format
B
Base operand specifier
BBC (Branch on Bit Clear) instruction
BBCC (Branch on Bit Clear and Clear) instruction
BBCCI (Branch on Bit Clear and Clear Interlocked) instruction
BBCS (Branch on Bit Clear and Set) instruction
BBS (Branch on Bit Set) instruction
BBSC (Branch on Bit Set and Clear) instruction
BBSS (Branch on Bit Set and Set) instruction
BBSSI (Branch on Bit Set and Set Interlocked) instruction
BCC (Branch on Carry Clear) instruction
BCS (Branch on Carry Set) instruction
BEQL (Branch on Equal) instruction
BEQLU (Branch on Equal Unsigned) instruction
BGEQ (Branch on Greater Than or Equal) instruction
BGEQU (Branch on Greater Than or Equal Unsigned) instruction
BGTR (Branch on Greater Than) instruction
BGTRU (Branch on Greater Than Unsigned) instruction
BICB2 (Bit Clear Byte 2 Operand) instruction
BICB3 (Bit Clear Byte 3 Operand) instruction
BICL2 (Bit Clear Long 2 Operand) instruction
BICL3 (Bit Clear Long 3 Operand) instruction
BICPSW (Bit Clear PSW) instruction
BICW2 (Bit Clear Word 2 Operand) instruction
BICW3 (Bit Clear Word 3 Operand) instruction
Binary operator
summary
BISB2 (Bit Set Byte 2 Operand) instruction
BISB3 (Bit Set Byte 3 Operand) instruction
BISL2 (Bit Set Long 2 Operand) instruction
BISL3 (Bit Set Long 3 Operand) instruction
BISPSW (Bit Set PSW) instruction
BISW2 (Bit Set Word 2 Operand) instruction
BISW3 (Bit Set Word 3 Operand) instruction
BITB (Bit Test Byte) instruction
BITL (Bit Test Long) instruction
BITW (Bit Test Word) instruction
BLBC (Branch on Low Bit Clear) instruction
BLBS (Branch on Low Bit Set) instruction
BLEQ (Branch on Less Than or Equal) instruction
BLEQU (Branch on Less Than or Equal Unsigned) instruction
Block storage allocation directives (.BLKx)
BLSS (Branch on Less Than) instruction
BLSSU (Branch on Less Than Unsigned) instruction
BNEQ (Branch on Not Equal) instruction
BNEQU (Branch on Not Equal Unsigned) instruction
BPT (Breakpoint Fault) instruction
Branch access type
Branch mode
operand specifier format
BRB (Branch Byte Displacement) instruction
BRW (Branch Word Displacement) instruction
BSBB (Branch to Subroutine Byte Displacement) instruction
BSBW (Branch to Subroutine Word Displacement) instruction
BUGL (Bugcheck Longword Message Identifier) instruction
BUGW (Bugcheck Word Message Identifier) instruction
BVC (Branch on Overflow Clear) instruction
BVS (Branch on Overflow Set) instruction
Byte data type
.BYTE directive
Byte storage directive (.BYTE)

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