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Updated: 11 December 1998

VAX MACRO and Instruction Set Reference Manual


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Index
Index
Figures
6-1 Using Transfer Vectors
10-1 Vector Register
10-2 Vector Length Register (VLR)
10-3 Vector Mask Register (VMR)
10-4 Vector Count Register (VCR)
10-5 Vector Processor Status Register (VPSR)
10-6 Vector Arithmetic Exception Register (VAER)
10-7 Vector Memory Activity Check (VMAC) Register
10-8 Vector Translation Buffer Invalidate All (VTBIA) Register
10-9 Vector State Address Register (VSAR)
10-10 Vector Control Word Operand (cntrl)
10-11 Vector Control Word Format
10-12 Memory Management Fault Stack Frame (as Sent by the Vector Processor)
10-13 Encoding of the Reserved Operand
E-1 Compatibility Mode Exception Stack Frame
Tables
3-1 Special Characters Used in VAX MACRO Statements
3-2 Separating Characters in VAX MACRO Statements
3-3 Unary Operators
3-4 Binary Operators
5-1 Addressing Modes
5-2 Floating-Point Literals Expressed as Decimal Numbers
5-3 Floating-Point Literals Expressed as Rational Numbers
5-4 Index Mode Addressing
6-1 Summary of General Assembler Directives
6-2 Summary of Macro Directives
6-3 .ENABLE and .DISABLE Symbolic Arguments
6-4 Condition Tests for Conditional Assembly Directives
6-5 Operand Descriptors
6-6 Program Section Attributes
6-7 Default Program Section Attributes
6-8 .SHOW and .NOSHOW Symbolic Arguments
8-1 Representation of Least-Significant Digit and Sign in Zoned Numeric Format
8-2 Representation of Least-Significant Digit and Sign in Overpunch Format
8-3 Floating-Point Literals Expressed as Decimal Numbers
8-4 Floating-Point Literals Expressed as Rational Numbers
8-5 General Register Addressing
8-6 Program Counter Addressing
9-1 Summary of EDITPC Pattern Operators
9-2 EDITPC Pattern Operator Encoding
10-1 Description of the Vector Processor Status Register (VPSR)
10-2 Possible VPSR <3:0 > Settings for MTPR
10-3 State of the Vector Processor
10-4 VAER Exception Condition Summary Word Encoding
10-5 IPR Assignments
10-6 Description of the Vector Control Word Operand
10-7 Dependencies for Vector Operate Instructions
10-8 Dependencies for Vector Load and Gather Instructions
10-9 Dependencies for Vector Store and Scatter Instructions
10-10 Dependencies for Vector Compare Instructions
10-11 Dependencies for Vector MERGE Instructions
10-12 Dependencies for IOTA Instruction
10-13 Dependencies for MFVP Instructions
10-14 Miscellaneous Dependencies
10-15 Possible Pairs of Read and Write Operations When Scalar/Vector Memory Synchronization (M) or VSYNC (V) Is Required Between Instructions That Reference the Same Memory Location
10-16 Encoding of the Exception Condition Type (ETYPE)
D-1 Opcodes (Alphabetic Order) and Functions
D-2 One_Byte Opcodes (Numeric Order)
D-3 Two_Byte Opcodes (Numeric Order)
E-1 Arithmetic Exception Type Codes
E-2 Compatibility Mode Exception Type Codes


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